Vendor selection for robust digital IP designs is critical to ensure the success of your SoC / chip / ASIC design. Issues with block integration and bug fixing can cost you dearly.
Moortec Semiconductor are committed to working closely with our customers to ensure successful integration and the 'out of box' performance you would expect. The designs delivered by our engineers are fully functional and have been exhaustively verified ensuring reduced risk and reduced time-to-market for your development programmes.
Example Digital IP Design:
MR74040 - SPI Block, 0.18um CMOS