Moortec PVT Subsystem
The Moortec In-Chip Monitoring Subsystem is a flexible modular solution which is easy to integrate and allows for the optimum placement of sensors based on PVT conditions.
The subsystem is available on the following processes:
- TSMC 40nm LP/ULP
- TSMC 28nm HPC+
- TSMC 16nm FFC/FF+
- TSMC 12nm FFC
- TSMC 7nm FF
Within the Moortec embedded in-chip monitoring subsystem fabric the Process Monitor provides the means for advanced node Integrated Circuit (IC) developers to detect the process variation of core digital MOS devices.
The Process Monitor can also be used to enable continuous Dynamic Frequency and Voltage Scaling (DVFS) optimisation systems, monitor manufacturing variability across chip, gate delay measurements, critical path analysis, critical voltage analysis and also monitor silicon ‘ageing’.
The subsystem also includes a Voltage Monitor which is a low power self-contained IP block specially designed to monitor voltage levels within the core logic voltage domains and provide accurate IR drop analysis.
The measurement range is customized to suit each technology. The Voltage Monitor IP can also monitor analogue (IO) supply domains and is also well-suited to monitoring supply droops and perturbations.
To complete the system there is a high precision low power junction Temperature Sensor which has been developed to be embedded into ASIC designs.
It can be used for a number of different applications including DVFS, device lifetime enhancement, device characterisation and thermal profiling.
The package also includes a sophisticated PVT Controller with AMBA APB interfacing, which supports multiple monitor instances, statistics gathering, a production test access port as well as other compelling features.