Plymouth, UK – 2nd May 2008 – Moortec have delivered a 65nm crystal oscillator and low-jitter PLL design to a major customer. Utilising a flexible ring oscillator architecture, the PLL provides a 50MHz to 800MHz output with less than 10ps rms of jitter (integrated bandwidth). The PLL is designed specifically to provide a very high immunity to supply noise. It is suitable for a wide range of clock generation solutions with input clock rates from 4MHz to 160MHz. The oscillator can be used with crystals in the range of 10MHz to 27MHz with under 2ps jitter rms.
Moortec, established in 2005, provides high quality analogue and mixed-signal cells for system on chip (SoC) semiconductor devices, thereby enabling quick and efficient time to market for customers.