The latest webinar from Moortec looks at why embedded in-chip monitors are now, more than ever becoming a necessity rather than a “nice to have” addition to the design. The webinar will take place on Wednesday 6th of December at 6pm GMT (10am PST) and then again on Thursday 7th of December at 8am GMT (4pm CST). Click on the links below to register depending on your location.
With advances in CMOS technology, and the scaling of transistor channel lengths to nanometer (nm) dimensions, the density of digital circuits per unit area of silicon has increased as has the process variability of devices manufactured.
The increase in digital logic (or gate) density, which equates to an increase in power density, is a major contributor to the heating of semiconductor devices manufactured on advanced node CMOS technologies. The Increased gate density, increased track and via impedances and process variability has also led to significant voltage (IR) drops across advanced node devices.
Process induced variations in circuit delays have begun to significantly adversely affect chip performance and power consumption. To address this, manufacturers have to design their Systems-on-Chip (SoC) to over-compensate for unwanted variability arising from manufacturing processes.
The presentation will also examine how embedded in chip monitoring supports the semiconductor design community’s demands for increased device reliability and enhanced performance optimization, enabling schemes such as DVFS, AVS and power management control systems.
The webinar is aimed at IC developers and engineers working on advanced node CMOS technologies from 40nm down to 7nm, will also highlight the challenges posed by process, temperature and voltage variability and how those challenges relate to the stability of complex SoC designs.
Moortec provide complete PVT Monitoring Subsystem IP solutions on 40nm, 28nm, FinFET and 7nm. As advanced technology design is posing new challenges to the IC design community, Moortec are able to help our customers understand more about the dynamic and static conditions on chip in order to optimize device performance and increase reliability. Being the only PVT dedicated IP vendor, Moortec is now considered a centre-point for such expertise.
After registering, you will receive a confirmation email containing information about joining the webinar.
Established in 2005, Moortec (Plymouth, UK) provides compelling embedded subsystem IP solutions for Process, Voltage & Temperature (PVT) monitoring, targeting advanced node CMOS technologies from 40nm down to 7nm. Moortec’s in-chip sensing solutions support the semiconductor design community’s demands for increased device reliability and enhanced performance optimization, enabling schemes such as DVFS, AVS and power management control systems. Moortec provides excellent support for IP application, integration and device test during production. Moortec’s high-performance analog and mixed-signal IP designs are delivered to ASIC and System on Chip (SoC) technologies within the consumer, mobile, automotive, high performance computing and telecommunications sectors.
Please contact Ramsay Allen on +44 1752 875133 or email:firstname.lastname@example.org
For more information please visit www.moortec.com