Don’t miss the latest in the series of webinars from Moortec which looks at the use of embedded monitoring for bridging the tangible gap between expectations around FinFET device performance and that actually seen in silicon.
The webinar will provide expertise on how to effectively implement monitoring architectures, enabling the analysis of dynamic conditions on chip for DVFS and AVS schemes that will in turn enhance device power and speed performance. The presentation, aimed at engineers working on FinFET technologies, will also highlight he challenges posed by process variability and how those challenges relate to the stability of complex SoC designs.
Moortec provide a complete PVT Monitoring Subsystem IP solutions on 40nm, 28nm, FinFET and 7nm. As advanced technology design is posing new challenges to the IC design community, Moortec are able to help our customers understand more about the dynamic and static conditions on chip in order to optimize device performance and increase reliability. Being the only PVT dedicated IP vendor, Moortec is now considered a centre-point for such expertise.
After registering, you will receive a confirmation email containing information about joining the webinar.