(USA/Europe) Wednesday 29th March 2017 at 10:00am PST
(China/Taiwan/S.Korea) Thursday 30th March 2017 at 4:00pm CST
Moortec will conduct two live webinar sessions on Wednesday 29th March at 10:00am PST and Thursday 30th March at 4:00pm CST. This Webinar from Moortec looks at the challenges involved in reaching working Silicon on 28nm and FinFET due to the associated complex and variable in-chip conditions which make it harder to correlate the design simulation with actual silicon. This session will help the designers to understand how precision monitoring inside the chip can help optimise and increase reliability of their product.
Designers over the years have been tackling the issues presented by complex, multi-core processor System on Chip (SoC) designs, which although enabling a marketplace of compelling electronic products attractive to the consumer, come with some very real challenges.
Moortec’s IP portfolio is based on current designer needs which is the driving force for the development of monitors which can provide accurate measurement of process, voltage and temperature (PVT) inside the die. This enables various optimising solutions that are based on the information getting out of these embedded monitors within SoC designs. The on-chip monitors allow for DVFS throughput optimisation scheme as sensing die temperature, detecting logic speed and monitoring voltage supply levels can be used intelligently to vary system clock frequencies and the voltage levels of supply domains.
This breaks down into three areas of interest:
The process variability of advanced node CMOS technologies has become a significant factor to the speed, power and performance of SoC devices. Moortec’s 3rd Generation Process Detector can detect the accurate process corner after wafer manufacturing for pre-test Binning.
Voltage Supplies on advanced node CMOS devices are subject to electrical noise, supply perturbations, transient events and glitches. Moortec’s 2nd Generation Voltage Monitor can detect IR Drops with high accuracy and precision over 16 different Vdd channels for FinFET with one monitor.
In-Chip thermal monitoring and management of advanced node designs is a critical consideration for SoC developers. Moortec’s 5th generation Temperature Sensor is widely used for various applications and can detect temperature variations within the die with a very high accuracy.
These optimisation requirements are not only specific to each application segment but also to classify each product based on different performance needs. Following is a list of applications and the most common purposes for monitoring. This list will be discussed in detail during the Webinar to focus on the utilization of in-chip monitors for each application.
- Power optimisation
- Thermal control and management
- Compensate Ageing
- Lifetime reliability
- Supply monitoring for safe operation
- Product qualification
- Process characterisation
- Temperature map
- Thermal runway
- Speed optimisation
Moortec Semiconductor has developed advanced node embedded sensors since 2010. A wealth of experience has been gained in their development in-Chip sensing and optimising solutions, providing a value based solution to the Customer’s present and future generation projects. Moortec is well known for building long term and successful collaborations with its customers based on trust and quality of the products. Moortec’s IP solutions are scheduled for delivery on FinFET nodes lower than 10nm, hence supporting your future project requirements.
Who should attend:
- Designers working on the advance node technologies from 65nm to FinFET.
- Product developers interested in optimisation schemes for their next generation products.
- Developers who have problems coping with the in-chip variations leading to non-functional products or lower performance products.
Date and time:
After registering, you will receive a confirmation email containing information about joining the webinar.