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Moortec Semiconductor provides a full custom analogue IC layout service. Having an analogue IC design background our engineers are able to layout designs with a enlightened consideration for circuit performance, reliability, die size and production yield.

Our layout expertise applies to block level and chip level designs, resulting in fully checked and verified GDSII data to be either integrated or taped in to the foundry. Our service includes:

  • Full Custom layout at cell, block and chip levels
  • DRC & LVS Verification of designs and delivery to foundry
  • Considered approach for performance, reliability, die size and production yield

Our extensive chip level layout experience allows us to adopt robust methodologies for ESD, Supplies, Substrate noise, Packaging and floor planning.